MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 160

• Manufacturer Part Number: MC9S08QG4MPAE
• Description: IC MCU 4K FLASH 8-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QG4MPAE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: HCS08
• No. Of I/o's: 6
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: S08QG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08QG8E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Inter-Integrated Circuit (S08IICV1)
11.1.4
Figure 11-2
11.2
This section describes each user-accessible pin signal.
11.2.1
The bidirectional SCL is the serial clock line of the IIC system.
11.2.2
The bidirectional SDA is the serial data line of the IIC system.
11.3
This section consists of the IIC register descriptions in address order.
158
External Signal Description
Register Definition
Block Diagram
SCL — Serial Clock Line
SDA — Serial Data Line
is a block diagram of the IIC.
CTRL_REG
ADDR_DECODE
CONTROL
ADDRESS
CLOCK
INPUT
SYNC
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure 11-2. IIC Functional Block Diagram
FREQ_REG
SCL
ARBITRATION
CONTROL
ADDR_REG
START
STOP
SDA
STATUS_REG
INTERRUPT
REGISTER
COMPARE
ADDRESS
IN/OUT
SHIFT
DATA
DATA_MUX
DATA_REG
DATA BUS
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