MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 236

• Manufacturer Part Number: MC9S08QG4MPAE
• Description: IC MCU 4K FLASH 8-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QG4MPAE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: HCS08
• No. Of I/o's: 6
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: S08QG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08QG8E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Timer/Pulse-Width Modulator (S08TPMV2)
When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
16.3.3
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from 0x0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overflow flag (TOF) becomes set. Writing
to TPMMODH or TPMMODL inhibits TOF and overflow interrupts until the other byte is written. Reset
sets the TPM counter modulo registers to 0x0000, which results in a free-running timer counter (modulo
disabled).
It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well
before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the first counter overflow will occur.
234
Reset
Reset
Reset
W
W
W
R
R
R
Bit 15
Timer Counter Modulo Registers (TPMMODH:TPMMODL)
Bit 7
Bit 7
0
0
0
7
7
7
Figure 16-6. Timer Counter Modulo Register High (TPMMODH)
Figure 16-7. Timer Counter Modulo Register Low (TPMMODL)
14
6
0
0
6
0
6
6
6
Figure 16-5. Timer Counter Register Low (TPMCNTL)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Any write to TPMCNTL clears the 16-bit counter.
13
5
0
0
5
0
5
5
5
12
4
0
0
4
0
4
4
4
11
3
3
0
3
0
3
3
0
10
2
0
0
2
0
2
2
2
Freescale Semiconductor
1
0
9
0
1
0
1
1
1
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0