MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 29

IC MCU 4K FLASH 8-PDIP

MC9S08QG4MPAE

Manufacturer Part Number
MC9S08QG4MPAE
Description
IC MCU 4K FLASH 8-PDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG4MPAE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
HCS08
No. Of I/o's
6
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
2.2.2
Out of reset, the MCU uses an internally generated clock provided by the internal clock source (ICS)
module. The internal frequency is nominally 16-MHz and the default ICS settings will provide for a
8-MHz bus out of reset. For more information on the ICS, see
(S08ICSV1).”
The oscillator module (XOSC) in this MCU is a Pierce oscillator that can accommodate a crystal or
ceramic resonator in either of two frequency ranges selected by the RANGE bit in ICSC2. Rather than a
crystal or ceramic resonator, an external clock source can be connected to the EXTAL input pin.
Refer to
resistors such as carbon composition resistors. Wire-wound resistors, and some metal film resistors, have
too much inductance. C1 and C2 normally should be high-quality ceramic capacitors that are specifically
designed for high-frequency applications.
R
value is not generally critical. Typical systems use 1 MΩ to 10 MΩ. Higher values are sensitive to
humidity, and lower values reduce gain and (in extreme cases) could prevent startup.
C1 and C2 are typically in the 5-pF to 25-pF range and are chosen to match the requirements of a specific
crystal or resonator. Be sure to take into account printed circuit board (PCB) capacitance and MCU pin
capacitance when sizing C1 and C2. The crystal manufacturer typically specifies a load capacitance which
is the series combination of C1 and C2, which are usually the same size. As a first-order approximation,
use 10 pF as an estimate of combined pin and PCB capacitance for each oscillator pin (EXTAL and
XTAL).
2.2.3
After a power-on reset (POR), the PTA5/IRQ/TCLK/RESET pin defaults to a general-purpose input port
pin, PTA5. Setting RSTPE in SOPT1 configures the pin to be the RESET input pin. After configured as
RESET, the pin will remain RESET until the next POR. The RESET pin can be used to reset the MCU
from an external source when the pin is driven low. When enabled as the RESET pin (RSTPE = 1), an
internal pullup device is automatically enabled.
Freescale Semiconductor
F
is used to provide a bias path to keep the EXTAL input in its linear range during crystal startup, and its
Figure 2-4
Oscillator (XOSC)
Reset (Input Only)
This pin does not contain a clamp diode to V
above V
The voltage measured on the internally pulled-up RESET pin will not be
pulled to V
The RESET pullup should not be used to pull up components external to the
MCU.
In EMC-sensitive applications, an external RC filter is recommended on the
RESET pin, if enabled. See
for the following discussion. R
DD
DD
.
. The internal gates connected to this pin are pulled to V
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure 2-4
NOTE
NOTE
S
(when used) and R
for an example.
DD
Chapter 10, “Internal Clock Source
and should not be driven
F
should be low-inductance
Chapter 2 External Signal Description
DD
.
27

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