MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 39

• Manufacturer Part Number: MC9S08QG4MPAE
• Description: IC MCU 4K FLASH 8-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QG4MPAE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: HCS08
• No. Of I/o's: 6
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: S08QG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08QG8E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.6.3
Stop1 mode is entered by executing a STOP instruction under the conditions as shown in
of the internal circuitry of the MCU is powered off in stop1, providing the lowest possible standby current.
Upon entering stop1, all I/O pins automatically transition to their default reset states.
Exit from stop1 is performed by asserting the wake-up pin (PTA5) on the MCU.
In addition, the real-time interrupt (RTI) can wake the MCU from stop1 if enabled.
Upon wake-up from stop1 mode, the MCU starts up as from a power-on reset (POR):
In addition to the above, upon waking up from stop1, the PDF bit in SPMSC2 is set. This flag is used to
direct user code to go to a stop1 recovery routine. PDF remains set until a 1 is written to PPDACK in
SPMSC2.
3.6.4
When the MCU enters any stop mode, system clocks to the internal peripheral modules are stopped. Even
in the exception case (ENBDM = 1), where clocks to the background debug logic continue to operate,
clocks to the peripheral systems are halted to reduce power consumption. Refer to
Mode,”
system behavior in stop modes.
Freescale Semiconductor
•
•
•
All module control and status registers are reset
The LVD reset function is enabled and the MCU remains in the reset state if V
trip point (low trip point selected due to POR)
The CPU takes the reset vector
Section 3.6.2, “Stop2
CPU
RAM
FLASH
Parallel Port Registers
ADC
ACMP
ICS
IIC
Stop1 Mode
On-Chip Peripheral Modules in Stop Modes
PTA5/IRQ/TCLK/RESET always functions as an active-low wakeup input
when the MCU is in stop2, regardless of how the pin is configured before
entering stop2. The pullup is not automatically enabled. To use the internal
pullup, set the PTAPE5 bit in the PTAPE register
Peripheral
Mode,” and
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Table 3-2. Stop Mode Behavior
Section 3.6.1, “Stop3
Stop1
Off
Off
Off
Off
Off
Off
Off
Off
NOTE
Standby
Stop2
Mode
Mode,” for specific information on
Off
Off
Off
Off
Off
Off
Off
Optionally On
Optionally On
Chapter 3 Modes of Operation
Standby
Standby
Standby
Standby
Standby
Standby
Section 3.6.3, “Stop1
Stop3
DD
is below the LVD
Table
1
2
3-1. Most
37