MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 180

IC MCU 4K FLASH 8-PDIP

MC9S08QG4MPAE

Manufacturer Part Number
MC9S08QG4MPAE
Description
IC MCU 4K FLASH 8-PDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG4MPAE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
HCS08
No. Of I/o's
6
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Keyboard Interrupts (S08KBIV2)
12.4
This on-chip peripheral module is called a keyboard interrupt (KBI) module because originally it was
designed to simplify the connection and use of row-column matrices of keyboard switches. However, these
inputs are also useful as extra external interrupt inputs and as an external means of waking the MCU from
stop or wait low-power modes.
The KBI module allows up to eight pins to act as additional interrupt sources. Writing to the KBIPEn bits
in the keyboard interrupt pin enable register (KBIPE) independently enables or disables each KBI pin.
Each KBI pin can be configured as edge sensitive or edge and level sensitive based on the KBMOD bit in
the keyboard interrupt status and control register (KBISC). Edge sensitive can be software programmed to
be either falling or rising; the level can be either low or high. The polarity of the edge or edge and level
sensitivity is selected using the KBEDGn bits in the keyboard interrupt edge select register (KBIES).
12.4.1
Synchronous logic is used to detect edges. A falling edge is detected when an enabled keyboard interrupt
(KBIPEn=1) input signal is seen as a logic 1 (the deasserted level) during one bus cycle and then a logic 0
(the asserted level) during the next cycle. A rising edge is detected when the input signal is seen as a logic
0 (the deasserted level) during one bus cycle and then a logic 1 (the asserted level) during the next
cycle.Before the first edge is detected, all enabled keyboard interrupt input signals must be at the
deasserted logic levels. After any edge is detected, all enabled keyboard interrupt input signals must return
to the deasserted level before any new edge can be detected.
A valid edge on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt request
will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in KBISC.
12.4.2
A valid edge or level on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt
request will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in
178
KBEDGn
Field
7:0
Reset:
Functional Description
Keyboard Edge Selects — Each of the KBEDGn bits selects the falling edge/low level or rising edge/high level
function of the corresponding pin).
0 Falling edge/low level.
1 Rising edge/high level.
W
Edge Only Sensitivity
Edge and Level Sensitivity
R
KBEDG7
0
7
KBEDG6
0
6
Table 12-4. KBIES Register Field Descriptions
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure 12-5. KBI Edge Select Register
KBEDG5
5
0
KBEDG4
0
4
Description
KBEDG3
0
3
KBEDG2
0
2
KBEDG1
0
1
Freescale Semiconductor
KBEDG0
0
0

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