PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 184

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 12-15: PORTH FUNCTIONS (CONTINUED)
TABLE 12-16: SUMMARY OF REGISTERS ASSOCIATED WITH PORTH
DS39960B-page 184
RH5/CCP8/
P3B/AN13/
C2IND
RH6/CCP7/
P1C/AN14/
C1INC
RH7/CCP6/
P1B/AN15
Legend:
PORTH
LATH
TRISH
ANCON1
ANCON2
ODCON2
Pin Name
Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
ANSEL15
ANSEL23
CCP10OD
TRISH7
LATH7
Function
Bit 7
RH7
C2IND
C1INC
CCP8
CCP7
CCP6
AN13
AN14
AN15
RH5
RH6
RH7
P3B
P1C
P1B
ANSEL14
ANSEL22
CCP9OD
TRISH6
Setting
LATH6
TRIS
Bit 6
RH6
0
1
0
1
0
1
x
0
1
0
1
0
1
x
0
1
0
1
0
1
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
ANSEL13
ANSEL21
CCP8OD
TRISH5
LATH5
Bit 5
RH5
Type
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
—
—
—
Preliminary
LATH<5> data output.
PORTH<5> data input.
CCP8 compare/PWM output. Takes priority over port data.
CCP8 capture input.
ECCP3 PWM Output B.
May be configured for tri-state during Enhanced PWM.
A/D Input Channel 13.
Default input configuration on POR. Does not affect digital input.
Comparator 2 Input D.
LATH<6> data output.
PORTH<6> data input.
CCP7 compare/PWM output. Takes priority over port data.
CCP7 capture input.
ECCP1 PWM Output C.
May be configured for tri-state during Enhanced PWM.
A/D Input Channel 14.
Default input configuration on POR. Does not affect digital input.
Comparator 1 Input C.
LATH<7> data output.
PORTH<7> data input.
CCP6 compare/PWM output. Takes priority over port data.
CCP6 capture input.
ECCP1 PWM Output B.
May be configured for tri-state during Enhanced PWM.
A/D Input Channel 15.
Default input configuration on POR. Does not affect digital input.
ANSEL12
ANSEL20
CCP7OD
TRISH4
LATH4
Bit 4
RH4
ANSEL11
ANSEL19
CCP6OD
TRISH3
LATH3
Bit 3
RH3
Description
ANSEL10
ANSEL18
CCP5OD
TRISH2
LATH2
Bit 2
RH2
 2010 Microchip Technology Inc.
ANSEL17
CCP4OD
ANSEL9
TRISH1
LATH1
Bit 1
RH1
ANSEL16
CCP3OD
ANSEL8
TRISH0
LATH0
Bit 0
RH0