PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 371

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PIC18F86K22-I/PTRSL

Manufacturer Part Number
PIC18F86K22-I/PTRSL
Description
MCU PIC 64K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
24.6
The comparator interrupt flag is set whenever any of
the following occurs:
• Low-to-high transition of the comparator output
• High-to-low transition of the comparator output
• Any change in the comparator output
The comparator interrupt selection is done by the
EVPOL<1:0>
(CMxCON<4:3>).
In order to provide maximum flexibility, the output of the
comparator may be inverted using the CPOL bit in the
CMxCON register (CMxCON<5>). This is functionally
identical to reversing the inverting and non-inverting
inputs of the comparator for a particular mode.
An interrupt is generated on the low-to-high or high-to-
low transition of the comparator output. This mode of
interrupt generation is dependent on EVPOL<1:0> in
the CMxCON register. When EVPOL<1:0> = 01 or 10 ,
the interrupt is generated on a low-to-high or high-to-
low transition of the comparator output. Once the
interrupt is generated, it is required to clear the interrupt
flag by software.
TABLE 24-2:
 2010 Microchip Technology Inc.
CPOL
Comparator Interrupts
0
1
bits
COMPARATOR INTERRUPT GENERATION
in
EVPOL<1:0>
the
00
01
10
11
00
01
10
11
CMxCON
register
Input Change
Comparator
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Preliminary
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PIC18F87K22 FAMILY
When EVPOL<1:0> = 11 , the comparator interrupt flag
is set whenever there is a change in the output value of
either comparator. Software will need to maintain
information about the status of the output bits, as read
from CMSTAT<7:5>, to determine the actual change
that occurred.
The CMPxIF bits (PIR6<2:0>) are the Comparator
Interrupt Flags. The CMPxIF bits must be reset by
clearing them. Since it is also possible to write a ‘ 1 ’ to
this register, a simulated interrupt may be initiated.
Table 24-2 shows the interrupt generation with respect
to comparator input voltages and EVPOL bit settings.
Both the CMPxIE bits (PIE6<2:0>) and the PEIE bit
(INTCON<6>) must be set to enable the interrupt. In
addition, the GIE bit (INTCON<7>) must also be set. If
any of these bits are clear, the interrupt is not enabled,
though the CMPxIF bits will still be set if an interrupt
condition occurs.
A simplified diagram of the interrupt section is shown in
Figure 24-3.
Note:
CxOUT Transition
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
CMPxIF
EVPOL<1:0> = 00 .
will
not
DS39960B-page 371
be
Generated
Interrupt
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
set
when

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