PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 291

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 21-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
WCOL
R/W-0
2:
3:
4:
When enabled, the SDAx and SCLx pins must be configured as inputs.
Bit combinations not specifically listed here are either reserved or implemented in SPI mode only.
When SSPM<3:0> = 1001, any reads or writes to the SSPxADD SFR address actually accesses the
SSPxMSK register.
This mode is only available when 7-Bit Address Masking mode is selected (MSSPMSK Configuration bit
is ‘1’).
WCOL: Write Collision Detect bit
In Master Transmit mode:
1 = A write to the SSPxBUF register was attempted while the I
0 = No collision
In Slave Transmit mode:
1 = The SSPxBUF register is written while it is still transmitting the previous word (must be cleared in
0 = No collision
In Receive mode (Master or Slave modes):
This is a “don’t care” bit.
SSPOV: Receive Overflow Indicator bit
In Receive mode:
1 = A byte is received while the SSPxBUF register is still holding the previous byte (must be cleared in
0 = No overflow
In Transmit mode:
This is a “don’t care” bit in Transmit mode.
SSPEN: Master Synchronous Serial Port Enable bit
1 = Enables the serial port and configures the SDAx and SCLx pins as the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: SCKx Release Control bit
In Slave mode:
1 = Releases clock
0 = Holds clock low (clock stretch), used to ensure data setup time
In Master mode:
Unused in this mode.
SSPM<3:0>: Master Synchronous Serial Port Mode Select bits
1111 = I
1110 = I
1011 = I
1001 = Load SSPMSK register at SSPxADD SFR address
1000 = I
0111 = I
0110 = I
SSPOV
R/W-0
transmission to be started (must be cleared in software)
software)
software)
SSPxCON1: MSSPx CONTROL REGISTER 1 (I
2
2
2
2
2
2
C Slave mode: 10-bit address with Start and Stop bit interrupts enabled
C Slave mode: 7-bit address with Start and Stop bit interrupts enabled
C Firmware Controlled Master mode (slave Idle)
C Master mode: clock = F
C Slave mode: 10-bit address
C Slave mode: 7-bit address
W = Writable bit
‘1’ = Bit is set
SSPEN
R/W-0
(1)
R/W-0
CKP
Preliminary
OSC
/(4 * (SSPxADD + 1))
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K22 FAMILY
SSPM3
R/W-0
(1)
(2)
(3,4)
SSPM2
2
R/W-0
C™ MODE)
(2)
2
C conditions were not valid for a
(2)
x = Bit is unknown
SSPM1
R/W-0
(2)
DS39960B-page 291
SSPM0
R/W-0
bit 0
(2)