PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 28

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 1-4:
DS39960B-page 28
RD0/CTPLS
RD1/T5CKI/T7G
RD2/PSP2/AD2
RD3/PSP3/AD3
RD4/SDO2/PSP4/AD4
RD5/SDI2/SDA2/PSP5/
AD5
Legend: TTL = TTL compatible input
Note 1:
RD0
CTPLS
RD1
T5CKI
T7G
RD2
PSP2
AD2
RD3
PSP3
AD3
RD4
SDO2
PSP4
AD4
RD5
SDI2
SDA2
PSP5
AD5
2:
3:
4:
5:
Pin Name
(4)
(4)
(4)
(4)
ST
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
PSP is available only in Microcontroller mode.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
2
C = I
= Schmitt Trigger input with CMOS levels
= Input
= Power
2
PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
C™/SMBus
Pin Number
TQFP
72
69
68
67
66
65
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Preliminary
I
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
2
C
PORTD is a bidirectional I/O port.
Digital I/O.
CTMU pulse generator output.
Digital I/O.
Timer5 clock input.
Timer7 external clock gate input.
Digital I/O.
Parallel Slave Port data.
External Memory Address Data 2.
Digital I/O.
Parallel Slave Port data.
External Memory Address Data 3.
Digital I/O.
SPI data out.
Parallel Slave Port data.
External Memory Address Data 4.
Digital I/O.
SPI data in.
I
Parallel Slave Port data.
External Memory Address Data 5.
2
C™ data I/O.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
 2010 Microchip Technology Inc.
DD
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