PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 475

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PIC18F86K22-I/PTRSL

Manufacturer Part Number
PIC18F86K22-I/PTRSL
Description
MCU PIC 64K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
=
=
register ‘f’
Subtract Literal from FSR
SUBFSR f, k
0  k  63
f  [ 0, 1, 2 ]
FSRf – k  FSRf
None
The 6-bit literal ‘k’ is subtracted from
the contents of the FSR specified
by ‘f’.
1
1
SUBFSR 2, 23h
Read
1110
Q2
03FFh
03DCh
1001
Process
Data
Q3
ffkk
destination
Write to
kkkk
Q4
Preliminary
PIC18F87K22 FAMILY
SUBULNK
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
Decode
No
FSR2
PC
FSR2
PC
Q1
Subtract Literal from FSR2 and Return
SUBULNK k
0  k  63
FSR2 – k  FSR2,
(TOS)  PC
None
The 6-bit literal ‘k’ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the
TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case
of the SUBFSR instruction, where f = 3
(binary ‘ 11 ’); it operates only on FSR2.
1
2
=
=
=
=
1110
Operation
register ‘f’
SUBULNK 23h
Read
No
Q2
03FFh
0100h
03DCh
(TOS)
1001
Operation
Process
Data
No
Q3
DS39960B-page 475
11kk
destination
Operation
Write to
kkkk
No
Q4

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