PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 65

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 4-3:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
PSPMD
R/W-0
2:
3:
Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
RTCCMD can only be set to ‘1’ after an EECON2 unlock sequence. Refer to Section 18.0 “Real-Time
Clock and Calendar (RTCC)” for the unlock sequence (Example 18-1).
Unimplemented on devices with 64 pins (PIC18F6XK22).
PSPMD: Peripheral Module Disable (PMD) PSP Enable/Disable bit
1 = PMD is enabled for PSP
0 = PMD is disabled for PSP
CTMUMD: PMD CTMU Enable/Disable bit
1 = PMD is enabled for CTMU, disabling all of its clock sources
0 = PMD is disabled for CTMU
RTCCMD: PMD RTCC Enable/Disable bit
1 = PMD is enabled for RTCC, disabling all of its clock sources
0 = PMD is disabled for RTCC
TMR4MD: TMR4MD Disable bit
1 = PMD is enabled and all TMR4MD clock sources disabled
0 = PMD is disabled and TMR4MD
TMR3MD: TMR3MD Disable bit
1 = PMD is enabled and all TMR3MD clock sources disabled
0 = PMD is disabled and TMR3MD
TMR2MD: TMR2MD Disable bit
1 = PMD is enabled and all TMR2MD clock sources disabled
0 = PMD is disabled and TMR2MD
TMR1MD: TMR1MD Disable bit
1 = PMD is enabled and all TMR1MD clock sources disabled
0 = PMD is disabled and TMR1MD
EMBMD: PMD EMB Enable/Disable bit
1 = PMD is enabled for EMB
0 = PMD is disabled for EMB
CTMUMD
R/W-0
PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
RTCCMD
W = Writable bit
‘1’ = Bit is set
R/W-0
(1,2)
TMR4MD
R/W-0
Preliminary
(3)
(1,2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K22 FAMILY
TMR3MD
R/W-0
TMR2MD
R/W-0
x = Bit is unknown
TMR1MD
R/W-0
DS39960B-page 65
EMBMD
R/W-0
bit 0
(3)