PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 360

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
23.4
The ADCON2 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set.
When the GO/DONE bit is set, sampling is stopped and
a conversion begins. The user is responsible for ensur-
ing the required acquisition time has passed between
selecting the desired input channel and setting the
GO/DONE bit.
This
(ADCON2<5:3>) remain in their Reset state (‘ 000 ’),
which is compatible with devices that do not offer
programmable acquisition times.
If desired, the ACQTx bits can be set to select a pro-
grammable acquisition time for the A/D module. When
the GO/DONE bit is set, the A/D module continues to
sample the input for the selected acquisition time, then
automatically begins a conversion. Since the acquisi-
tion time is programmed, there may be no need to wait
for an acquisition time between selecting a channel and
setting the GO/DONE bit.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
23.5
The A/D conversion time per bit is defined as T
A/D conversion requires 14 T
The
software-selectable.
The possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Using the internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
minimum T
130 in Table 31-27.)
Table 23-1 shows the resultant T
the device operating frequencies and the A/D clock
source selected.
DS39960B-page 360
AD
) must be as short as possible but greater than the
OSC
OSC
OSC
source
OSC
OSC
OSC
occurs
Selecting and Configuring
Automatic Acquisition Time
Selecting the A/D Conversion
Clock
AD
. (For more information, see parameter
of
when
the
A/D
AD
the
are:
AD
conversion
per 12-bit conversion.
AD
ACQT<2:0>
times derived from
clock
AD
. The
Preliminary
bits
is
TABLE 23-1:
23.6
The ANCON0, ANCON1, ANCON2, TRISA, TRISF,
TRISG and TRISH registers control the operation of the
A/D port pins. The port pins needed as analog inputs
must have their corresponding TRISx bits set (input). If
the TRISx bit is cleared (output), the digital output level
(V
The A/D operation is independent of the state of the
CHS<3:0> bits and the TRISx bits.
Note 1:
OH
Note 1: When reading the PORT register, all pins
Operation
16 T
32 T
64 T
2 T
4 T
8 T
or V
AD Clock Source (T
RC
2:
OSC
OSC
OSC
Configuring Analog Port Pins
OSC
OSC
OSC
2: Analog levels on any pin defined as a
(2)
OL
The RC source has a typical T
4  s.
For device frequencies above 1 MHz, the
device must be in Sleep mode for the
entire conversion or the A/D accuracy may
be out of specification.
) will be converted.
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured
converted.
digital input may cause the digital input
buffer to consume current out of the
device’s specification limits.
T
FREQUENCIES
AD
ADCS<2:0>
vs. DEVICE OPERATING
 2010 Microchip Technology Inc.
000
100
001
101
010
110
x11
input
AD
)
will
be
Frequency
11.43 MHz
22.86 MHz
40.00 MHz
40.00 MHz
Maximum
1.00 MHz
2.86 MHz
5.71 MHz
Device
AD
accurately
time of
(1)