PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 536

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
Extended Instruction Set
External Memory Bus........................................................ 119
External Oscillator Modes
F
Fail-Safe Clock Monitor............................................. 401, 422
Fast Register Stack............................................................. 89
Firmware Instructions........................................................ 429
Flash Program Memory..................................................... 109
FSCM. See Fail-Safe Clock Monitor.
G
GOTO................................................................................ 450
DS39960B-page 536
ADDFSR ................................................................... 472
ADDULNK................................................................. 472
CALLW...................................................................... 473
MOVSF ..................................................................... 473
MOVSS ..................................................................... 474
PUSHL ...................................................................... 474
SUBFSR ................................................................... 475
SUBULNK ................................................................. 475
16-Bit Byte Select Mode ........................................... 125
16-Bit Byte Write Mode ............................................. 123
16-Bit Data Width Modes .......................................... 122
16-Bit Mode Timing ................................................... 126
16-Bit Word Write Mode............................................ 124
8-Bit Data Width Mode .............................................. 127
8-Bit Mode Timing ..................................................... 128
Address and Data Lines for Different
Address and Data Width ........................................... 121
Address Shifting ........................................................ 121
Control ...................................................................... 120
I/O Port Functions ..................................................... 119
Operation in Power-Managed Modes ....................... 129
Program Memory Modes .......................................... 122
Wait States................................................................ 122
Weak Pull-ups on Port Pins ...................................... 122
Clock Input (EC Modes) .............................................. 49
HS ............................................................................... 48
Exiting Operation ...................................................... 422
Interrupts in Power-Managed Modes ........................ 423
POR or Wake from Sleep ......................................... 423
WDT During Oscillator Failure .................................. 422
Associated Registers ................................................ 118
Control Registers ...................................................... 110
Erase Sequence ....................................................... 114
Erasing ...................................................................... 114
Operation During Code-Protect ................................ 118
Reading..................................................................... 113
Table Pointer
Table Pointer Boundaries ......................................... 112
Table Reads and Table Writes ................................. 109
Write Sequence ........................................................ 116
Writing ....................................................................... 115
Address and Data Widths (table) ...................... 121
Extended Microcontroller .................................. 122
Microcontroller .................................................. 122
EECON1 and EECON2 .................................... 110
TABLAT (Table Latch) Register........................ 112
TBLPTR (Table Pointer) Register ..................... 112
Boundaries Based on Operation....................... 112
Protection Against Spurious Writes .................. 118
Unexpected Termination................................... 118
Write Verify ....................................................... 118
Preliminary
H
Hardware Multiplier........................................................... 137
High/Low-Voltage Detect .................................................. 377
High/Low-Voltage ICSP Programming. See Single
HLVD. See High/Low-Voltage Detect. .............................. 377
I
I/O Ports............................................................................ 163
I
2
C Mode (MSSP)
8 x 8 Multiplication Algorithms .................................. 137
Operation .................................................................. 137
Performance Comparison (table).............................. 137
Applications .............................................................. 381
Associated Registers ................................................ 382
Current Consumption................................................ 379
Effects of a Reset ..................................................... 382
Operation .................................................................. 378
Setup ........................................................................ 379
Start-up Time ............................................................ 379
Typical Application.................................................... 381
Supply ICSP Programming
Open-Drain Outputs.................................................. 165
Output Pin Drive ....................................................... 163
Pin Capabilities ......................................................... 163
Pull-up Configuration ................................................ 163
Acknowledge Sequence Timing ............................... 318
Associated Registers ................................................ 324
Baud Rate Generator ............................................... 311
Bus Collision
Clock Arbitration ....................................................... 312
Clock Stretching........................................................ 304
Clock Synchronization and the CKP bit .................... 305
Effects of a Reset ..................................................... 319
General Call Address Support .................................. 308
I
Master Mode............................................................. 309
Multi-Master Communication, Bus Collision
Multi-Master Mode .................................................... 319
Operation .................................................................. 294
Read/Write Bit Information (R/W Bit) ................ 294, 297
Registers .................................................................. 289
Serial Clock (RC3/SCKx/SCLx) ................................ 297
Slave Mode............................................................... 294
Sleep Operation........................................................ 319
Stop Condition Timing .............................................. 318
2
C Clock Rate w/BRG.............................................. 311
During Sleep..................................................... 382
During a Repeated Start Condition................... 322
During a Stop Condition ................................... 323
10-Bit Slave Receive Mode (SEN = 1) ............. 304
10-Bit Slave Transmit Mode ............................. 304
7-Bit Slave Receive Mode (SEN = 1) ............... 304
7-Bit Slave Transmit Mode ............................... 304
Operation.......................................................... 310
Reception ......................................................... 315
Repeated Start Condition Timing ..................... 314
Start Condition Timing ...................................... 313
Transmission .................................................... 315
and Arbitration .................................................. 319
Address Masking Modes
Addressing........................................................ 294
Reception ......................................................... 297
Transmission .................................................... 297
5-Bit .......................................................... 295
7-Bit .......................................................... 296
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