PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 454

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PIC18F86K22-I/PTRSL

Manufacturer Part Number
PIC18F86K22-I/PTRSL
Description
MCU PIC 64K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87K22 FAMILY
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39960B-page 454
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
MOVFF f
0  f
0  f
(f
None
The contents of source register, ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register
2
2
MOVFF
s
Read
(src)
read
)  f
1100
1111
No
Q2
=
=
=
=
s
d
 4095
 4095
d
33h
11h
33h
33h
s
REG1, REG2
,f
ffff
ffff
d
operation
Process
Data
No
Q3
s
’ can be anywhere
ffff
ffff
register ‘f’
operation
(dest)
Write
d
No
Q4
ffff
ffff
’.
s
’, are
d
Preliminary
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR Register =
BSR Register =
Q1
Move Literal to Low Nibble in BSR
MOVLW k
0  k  255
k  BSR
None
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘ 0 ’
regardless of the value of k
1
1
literal ‘k’
MOVLB
Read
0000
Q2
 2010 Microchip Technology Inc.
02h
05h
0001
Process
5
Data
Q3
kkkk
Write literal
7
‘k’ to BSR
:k
4
.
Q4
kkkk

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