PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 384

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PIC18F86K22-I/PTRSL

Manufacturer Part Number
PIC18F86K22-I/PTRSL
Description
MCU PIC 64K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87K22 FAMILY
27.1
The control registers for the CTMU are:
• CTMUCONH
• CTMUCONL
• CTMUICON
REGISTER 27-1:
DS39960B-page 384
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CTMUEN
R/W-0
CTMU Registers
CTMUEN: CTMU Enable bit
1 = Module is enabled
0 = Module is disabled
Unimplemented: Read as ‘ 0 ’
CTMUSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
TGEN: Time Generation Enable bit
1 = Enables edge delay generation
0 = Disables edge delay generation
EDGEN: Edge Enable bit
1 = Edges are not blocked
0 = Edges are blocked
EDGSEQEN: Edge Sequence Enable bit
1 = Edge 1 event must occur before Edge 2 event can occur
0 = No edge sequence is needed
IDISSEN: Analog Current Source Control bit
1 = Analog current source output is grounded
0 = Analog current source output is not grounded
CTTRIG: Trigger Control bit
1 = Trigger output is enabled
0 = Trigger output is disabled
U-0
CTMUCONH: CTMU CONTROL HIGH REGISTER
W = Writable bit
‘1’ = Bit is set
CTMUSIDL
R/W-0
R/W-0
TGEN
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EDGEN
R/W-0
The
(Register 27-1 and Register 27-2) contain control bits
for configuring the CTMU module edge source selec-
tion, edge source polarity selection, edge sequencing,
A/D trigger, analog circuit capacitor discharge and
enables. The CTMUICON register (Register 27-3) has
bits for selecting the current source range and current
source trim.
CTMUCONH
EDGSEQEN
R/W-0
and
 2010 Microchip Technology Inc.
x = Bit is unknown
IDISSEN
R/W-0
CTMUCONL
CTTRIG
R/W-0
registers
bit 0

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