PIC18F86K22-I/PTRSL Microchip Technology, PIC18F86K22-I/PTRSL Datasheet - Page 261

• Manufacturer Part Number: PIC18F86K22-I/PTRSL
• Description: MCU PIC 64K FLASH XLP 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.2
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
ECCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every fourth rising edge
• Every 16
The event is selected by the mode select bits,
CCPxM<3:0> (CCPxCON<3:0>). When a capture is
made, the interrupt request flag bit, CCPxIF, is set (see
Table 20-2). The flag must be cleared by software. If
another capture occurs before the value in the
CCPRxH/L register is read, the old captured value is
overwritten by the new captured value.
TABLE 20-2:
20.2.1
In Capture mode, the appropriate ECCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
FIGURE 20-1:
 2010 Microchip Technology Inc.
ECCP Module
Note:
ECCP1 Pin
1
2
3
Capture Mode
th
ECCP PIN CONFIGURATION
If the ECCPx pin is configured as an out-
put, a write to the port can cause a capture
condition.
rising edge
ECCP1/2/3 INTERRUPT FLAG
BITS
CCP1CON<3:0>
Prescaler
 1, 4, 16
CAPTURE MODE OPERATION BLOCK DIAGRAM
Q1:Q4
PIR3<1>
PIR3<2>
PIR4<0>
Flag Bit
4
Edge Detect
4
and
Set CCP1IF
Preliminary
C1TSEL0
C1TSEL1
C1TSEL2
C1TSEL0
C1TSEL1
C1TSEL2
PIC18F87K22 FAMILY
20.2.2
The timers that are to be used with the capture feature
(Timer1 2, 3, 4, 6, 8, 10 or 12) must be running in Timer
mode or Synchronized Counter mode. In Asynchro-
nous Counter mode, the capture operation may not
work. The timer to be used with each ECCP module is
selected in the CCPTMRS0 register (Register 20-2).
20.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false interrupts.
The interrupt flag bit, CCPxIF, should also be cleared
following any such change in operating mode.
20.2.4
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
ECCP module is turned off, or Capture mode is dis-
abled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 20-1 provides the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 20-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ; Load WREG with the
CCP1CON
TIMER1/2/3/4/6/8/10/12 MODE
SELECTION
SOFTWARE INTERRUPT
ECCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn ECCP module off
; new prescaler mode
; value and ECCP ON
; Load CCP1CON with
; this value
TMR3
Enable
TMR1
Enable
CCPR1H
TMR3H
TMR1H
DS39960B-page 261
CCPR1L
TMR1L
TMR3L