IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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Table 36. EP1K10 External Bidirectional Timing Parameters
Symbol
Min
t
(2)
2.2
INSUBIDIR
t
(2)
0.0
INHBIDIR
t
(2)
2.0
OUTCOBIDIR
t
(2)
XZBIDIR
t
(2)
ZXBIDIR
t
(4)
3.1
INSUBIDIR
t
(4)
0.0
INHBIDIR
t
(4)
0.5
OUTCOBIDIR
t
(4)
XZBIDIR
t
(4)
ZXBIDIR
Notes to tables:
(1)
All timing parameters are described in
(2)
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(3)
These parameters are specified by characterization.
(4)
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Table 37. EP1K30 Device LE Timing Microparameters (Part 1 of 2)
Symbol
Min
t
LUT
t
CLUT
t
RLUT
t
PACKED
t
EN
t
CICO
t
CGEN
t
CGENR
t
CASC
t
C
t
CO
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Speed Grade
-1
-2
Max
Min
2.3
0.0
6.6
2.0
8.8
8.8
3.3
0.0
5.1
0.5
7.3
7.3
Tables 22
through
29
Tables 37
through
43
show EP1K30 device internal and external timing
parameters.
Speed Grade
-1
-2
Max
Min
0.7
0.5
0.6
0.3
0.6
0.1
0.4
0.1
0.6
0.0
0.3
Notes
(1),
(3)
-3
Max
Min
Max
3.2
0.0
7.8
2.0
9.6
11.2
14.0
11.2
14.0
6.4
9.2
9.2
in this data sheet.
Note (1)
-3
Max
Min
Max
0.8
1.1
0.6
0.8
0.7
1.0
0.4
0.5
0.8
1.0
0.1
0.2
0.5
0.7
0.1
0.2
0.8
1.0
0.0
0.0
0.4
0.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
13
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
65