EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 264

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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Functional Description
Arria II GX Device Handbook, Volume 1
1
Remote system upgrades are supported in AS configuration schemes. You can also
implement remote system upgrades in conjunction with advanced Arria II GX
features such as real-time decompression of configuration data and design security
using the advanced encryption standard (AES) for secure and efficient field upgrades.
The largest serial configuration device currently supports 128 MBits of configuration
bitstream.
The dedicated remote system upgrade circuitry in Arria II GX devices manages
remote configuration and provides error detection, recovery, and status information.
User logic or a Nios II processor implemented in the Arria II GX device logic array
provides access to the remote configuration data source and an interface to the
system’s configuration memory.
Arria II GX devices have remote system upgrade processes that involve the following
steps:
1. A Nios II processor (or user logic) implemented in the Arria II GX device logic
2. The Nios II processor (or user logic) stores this new configuration data in
3. The Nios II processor (or user logic) starts a reconfiguration cycle with the new or
4. The dedicated remote system upgrade circuitry detects and recovers from any
Figure 9–21
(The numbers in
Figure 9–21. Functional Diagram of Arria II GX Remote System Upgrade
Arria II GX devices only support remote system upgrade in the single device AS
configuration scheme.
array receives new configuration data from a remote location. The connection to
the remote source uses a communication protocol such as transmission control
protocol/Internet protocol (TCP/IP), peripheral component interconnect (PCI),
user datagram protocol (UDP), universal asynchronous receiver/transmitter
(UART), or a proprietary interface.
non-volatile configuration memory.
updated configuration data.
errors that might occur during or after the reconfiguration cycle and provides
error status information to the user design.
Development
Location
shows the steps required for performing remote configuration updates.
1
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices
Figure 9–21
Data
Data
coincide with the steps previously mentioned.)
2
Data
Control Module
Arria II GX
Device
Arria II GX Configuration
© July 2010 Altera Corporation
4
3
Remote System Upgrades
Configuration
Memory