ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 100

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

PWM auto-reload timer (ART)
100/324
Bit 0 = OVF Overflow Flag
This bit is set by hardware and cleared by software reading the ARTCSR register. It
indicates the transition of the counter from FFh to the ARTARR value
Counter Access Register (ARTCAR)
Read/Write
Reset value: 0000 0000 (00h)
Bit 7:0 = CA[7:0] Counter Access Data
These bits can be set and cleared either by hardware or by software. The ARTCAR register
is used to read or write the auto-reload counter “on the fly” (while it is counting).
Auto-Reload Register (ARTARR)
Read/Write
Reset value: 0000 0000 (00h)
Bit 7:0 = AR[7:0] Counter Auto-Reload Data
These bits are set and cleared by software. They are used to hold the auto-reload value
which is automatically loaded in the counter when an overflow occurs. At the same time, the
PWM output levels are changed according to the corresponding OPx bit in the PWMCR
register.
This register has two PWM management functions:
●
●
Table 44.
CA7
AR7
ARTARR value
0: New transition not yet reached
1: Transition reached
Adjusting the PWM frequency
Setting the PWM duty cycle resolution
7
7
[128..191]
[192..223]
[224..239]
[0..127]
0
PWM frequency vs resolution
CA6
AR6
CA5
AR5
Resolution
Doc ID 12370 Rev 8
> 7-bit
> 6-bit
> 5-bit
> 4-bit
8-bit
CA4
AR4
CA3
AR3
~0.244 kHz
~0.244 kHz
~0.488 kHz
~0.977 kHz
~1.953 kHz
Min
CA2
AR2
f
PWM
.
CA1
AR1
31.25 kHz
62.5 kHz
125 kHz
250 kHz
500 kHz
ST72561-Auto
Max
CA0
AR0
0
0