ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 269

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
19.2.1
Table 98.
Using a prebyte
The instructions are described with one to four opcodes.
In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three
different prebyte opcodes are defined. These prebytes modify the meaning of the instruction
they precede.
The whole instruction becomes:
These prebytes enable instruction in Y as well as indirect addressing modes to be
implemented. They precede the opcode of the instruction in X or the instruction using direct
addressing mode. The prebytes are:
Shift and rotates
Unconditional jump or call
Conditional branch
Interruption management
Condition code flag modification
)
Memo
BRES
BSET
BTJF
BTJT
ADC
ADD
AND
BCP
PC-2 end of previous instruction
PC-1 prebyte
PC opcode
PC+1 additional word (0 to 2) according to the number of bytes required to compute the
effective address
PDY 90 replace an X based instruction using immediate, direct, indexed, or inherent
addressing mode by a Y one.
PIX 92 replace an instruction using direct, direct bit, or direct relative addressing mode
to an instruction using the corresponding indirect addressing mode.
It also changes an instruction using X indexed addressing mode to an instruction using
indirect X indexed addressing mode.
PIY 91 replace an instruction using X indirect indexed addressing mode by a Y one.
Add with Carry
Addition
Logical And
Bit compare A,
Memory
Bit Reset
Bit Set
Jump if bit is false (0) btjf Byte, #3, Jmp1
Jump if bit is true (1)
Description
Instruction groups
Description
A = A + M + C
tst (A . M)
btjt Byte, #3, Jmp1
A = A + M
A = A . M
bres Byte, #3
bset Byte, #3
Function/example
Doc ID 12370 Rev 8
SLL
JRA
JRxx
TRAP
SIM
SRL
JRT
WFI
RIM
SRA
JRF
HALT
SCF
Dst
M
M
M
M
A
A
A
A
RLC
IRET
JP
RCF
Instruction
Src
M
M
M
M
RRC
CALL CALLR
I1
SWAP
H
H
H
I0
Instruction set
SLA
NOP RET
N
N
N
N
N
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Z
Z
Z
Z
Z
C
C
C
C
C