ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 91

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
Table 40.
Bit 4 = SMS Slow mode select
This bit is set and cleared by software.
See
MCC/RTC
Bits 3:2 = TB[1:0] Time base control
These bits select the programmable divider time base. They are set and cleared by
software.
Table 41.
A modification of the time base is taken into account at the end of the current period
(previously set) to avoid an unwanted time shift. This allows to use this time base as a real
time clock.
Bit 1 = OIE Oscillator interrupt enable
This bit set and cleared by software.
This interrupt can be used to exit from ACTIVE HALT mode.
When this bit is set, calling the ST7 software HALT instruction enters the ACTIVE HALT
power saving mode
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software reading the CSR register. It indicates
when set that the main oscillator has reached the selected elapsed time (TB1:0).
f
f
f
f
16000
32000
80000
200000
Counter prescaler
OSC2
OSC2
OSC2
OSC2
Section 7.2: Slow mode
0: Normal mode. f
1: Slow mode. f
0: Oscillator interrupt disabled
1: Oscillator interrupt enabled
0: Timeout not reached
1: Timeout reached
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for more details.
CPU clock frequency in SLOW mode
Time base selection
f
CPU
.
4ms
8ms
20ms
50ms
CPU
in SLOW mode
CPU
is given by CP1, CP0
f
OSC2
= f
and
OSC2
Doc ID 12370 Rev 8
= 4 MHz
Section 10: Main clock controller with real time clock
Main clock controller with real time clock MCC/RTC
Time base
2ms
4ms
10ms
25ms
f
OSC2
= 8 MHz
CP1
0
1
0
1
TB1
CP0
0
1
0
1
0
1
0
1
TB0
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