ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 55

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ST72561J9-Auto

Manufacturer Part Number
ST72561J9-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J9-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
ST72561-Auto
6.5.2
Caution:
Interrupt software priority registers (ISPRX)
Read/ write (bit 7:4 of ISPR3 are read only)
Reset value: 1111 1111 (FFh)
These four registers contain the interrupt software priority of each interrupt vector.
Table 14.
1. Bits in the ISPRx registers which correspond to the TLI can be read and written but they are not significant
The RESET, TRAP and TLI vectors have no software priorities. When one is serviced, the I1
and I0 bits of the CC register are both set.
If the I1_x and I0_x bits are modified while the interrupt x is executed the following behavior
has to be considered: If the interrupt x is still pending (new interrupt or flag not cleared) and
the new software priority is higher than the previous one, the interrupt x is re-entered.
Otherwise, the software priority stays unchanged up to the next interrupt request (after the
IRET of the interrupt x).
Table 15.
HALT
IRET
JRM
JRNM
Instruction
in the interrupt process management.
Each interrupt vector (except RESET and TRAP) has corresponding bits in these
registers where its own software priority is stored. This correspondence is shown in the
following table.
Each I1_x and I0_x bit value in the ISPRx registers has the same meaning as the I1
and I0 bits in the CC register.
Level 0 cannot be written (I1_x = 1, I0_x = 0). In this case, the previously stored value
is kept (Example: previous = CFh, write = 64h, result = 44h)
ISPR0
ISPR1
ISPR2
ISPR3
Interrupt priority bits
Dedicated interrupt instruction set
Entering Halt mode
Interrupt routine return
Jump if I1:0 = 11 (level 3)
Jump if I1:0 <> 11
Vector address
FFFBh-FFFAh
FFE1h-FFE0h
FFF9h-FFF8h
I1_11
New description
I1_3
I1_7
1
7
...
I0_11
I0_3
I0_7
1
Doc ID 12370 Rev 8
I1_10
I1_2
I1_6
1
Pop CC, A, X, PC
I1:0 = 11 ?
I1:0 <> 11?
Function/example
I0_10
I0_2
I0_6
1
I1_13
I1_1
I1_5
I1_9
I1_13 and I0_13 bits
I1_0 and I0_0 bits
I1_1 and I0_1 bits
1
ISPRx bits
I1
I1
I0_13
I0_1
I0_5
I0_9
...
H
H
0
I0
I0
I1_12
I1_0
I1_4
I1_8
(1)
N
N
Interrupts
Z
Z
I0_12
I0_0
I0_4
I0_8
55/324
0
C
C

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