ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 157

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
14.8.3
Note:
Data I/O register (SPIDR)
Read/ write
Reset value: Undefined
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see
Table 59.
Address
(Hex.)
21
22
23
D7
7
Warning:
SPIDR
Reset value
SPICR
Reset value
SPICSR
Reset value
SPI register map and reset values
Register label
D6
A write to the SPIDR register places data directly into the
shift register for transmission.
Figure
D5
70).
SPIE
SPIF
MSB
Doc ID 12370 Rev 8
7
x
0
0
WCOL
SPE
6
0
0
D4
x
SPR2
OVR
5
x
0
0
D3
MODF
MSTR
4
x
0
0
Serial peripheral interface (SPI)
CPOL
D2
3
x
x
0
CPHA
SOD
2
x
x
0
D1
SPR1
SSM
1
x
x
0
157/324
D0
SPR0
0
LSB
SSI
0
x
x
0