ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 90

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Main clock controller with real time clock MCC/RTC
10.4
Table 38.
10.5
Note:
10.6
10.6.1
90/324
WAIT
ACTIVE HALT
HALT
and
AWUF HALT
Mode
Low power modes
Effect of low power modes on MCC/RTC
Interrupts
The MCC/RTC interrupt event generates an interrupt if the OIE bit of the MCCSR register is
set and the interrupt mask in the CC register is not active (RIM instruction).
Table 39.
The MCC/RTC interrupt wakes up the MCU from ACTIVE HALT mode, not from HALT or
AWUF HALT mode.
Register description
MCC control/status register (MCCSR)
Read/Write
Reset value: 0000 0000 (00h)
Bit 7 = MCO Main clock out selection
This bit enables the MCO alternate function on the corresponding I/O port. It is set and
cleared by software.
Bits 6:5 = CP[1:0] CPU clock prescaler
These bits select the CPU clock prescaler which is applied in the different slow modes. Their
action is conditioned by the setting of the SMS bit. These two bits are set and cleared by
software
Time base overflow event
MCO
0: MCO alternate function disabled (I/O pin free for general-purpose I/O)
1: MCO alternate function enabled (f
7
No effect on MCC/RTC peripheral.
MCC/RTC interrupt cause the device to exit from WAIT mode.
No effect on MCC/RTC counter (OIE bit is set), the registers are frozen.
MCC/RTC interrupt cause the device to exit from ACTIVE HALT mode.
MCC/RTC counter and registers are frozen.
MCC/RTC operation resumes when the MCU is woken up by an interrupt with “exit from
HALT” capability.
Interrupt event
MCC/RTC Interrupt control wake-up capability
CP1
CP0
Doc ID 12370 Rev 8
SMS
Event
flag
OIF
OSC2
Description
on I/O port)
TB1
Enable
control
OIE
bit
TB0
from
wait
Exit
Yes
OIE
ST72561-Auto
from
No
Exit
halt
OIF
1)
0