ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 111

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
12.3.6
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OC
Timing resolution is one count of the free running counter: (
Procedure
To use the output compare function, select the following in the CR2 register:
●
●
And select the following in the CR1 register:
●
●
When a match is found between OCRi register and CR register:
●
●
●
The OC
the following formula:
Where:
Δ
f
PRESC
If the timer clock is an external clock, the formula is:
Where:
Δ
f
Clearing the output compare interrupt request (that is, clearing the OCFi bit) is done by:
●
●
CPU
EXT
t = Output compare period (in seconds)
t = output compare period (in seconds)
= external timer clock frequency (in hertz)
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCFi bit is set.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is
cleared in the CC register (CC).
Reading the SR register while the OCFi bit is set.
An access (read or write) to the OCiLR register.
= CPU clock frequency (in hertz)
= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits, see
i
R register value required for a specific timing application can be calculated using
i
R value to 8000h.
Doc ID 12370 Rev 8
Δ
Δ
OCiR =
OCiR =
Table
Δt
Δt
PRESC
*
50).
f
EXT
*
f
CPU
f
CPU/
CC[1:0]
).
Table
50)
16-bit timer
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