ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 46

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Supply, reset and clock management
Note:
5.6.2
Caution:
46/324
The LVD function is illustrated in
Provided the minimum V
the MCU can only be in two modes:
●
●
In these conditions, secure operation is always ensured for the application without the need
for external reset hardware.
During a Low Voltage Detector Reset, the RESET pin is held low, thus permitting the MCU
to reset other devices.
The LVD allows the device to be used without any external RESET circuitry.
The LVD is an optional function which can be selected by option byte.
It is recommended to make sure that the V
device is exiting from Reset, to ensure the application functions properly.
Figure 15. Low voltage detector vs reset
Auxiliary voltage detector (AVD)
The Voltage Detector function (AVD) is based on an analog comparison between a V
and V
falling voltage is lower than the V
parasitic detection (hysteresis).
The output of the AVD comparator is directly readable by the application software through a
real time status bit (AVDF) in the SICSR register. This bit is read only.
The AVD function is active only if the LVD is enabled through the option byte.
Monitoring the V
If the AVD interrupt is enabled, an interrupt is generated when the voltage crosses the
V
In the case of a drop in voltage, the AVD interrupt acts as an early warning, allowing
software to shut down safely before the LVD resets the microcontroller (see
The interrupt on the rising edge is used to inform the application that the V
is over.
If the voltage rise time t
selected by option byte), no AVD interrupt will be generated when V
IT+(AVD)
under full software control
in static safe reset
IT+(AVD)
V
V
RESET
IT+
IT-
(LVD)
(LVD)
or V
IT-(AVD)
reference value and the V
V
DD
DD
threshold (AVDF bit toggles).
rv
main supply
DD
is less than 256 or 4096 CPU cycles (depending on the reset delay
value (guaranteed for the oscillator frequency) is above V
Doc ID 12370 Rev 8
Figure
IT+(AVD)
DD
15.
reference value for rising voltage in order to avoid
DD
main supply. The V
supply voltage rises monotonously when the
V
hys
IT-(AVD)
IT+(AVD)
reference value for
DD
Figure
is reached.
ST72561-Auto
warning state
16).
IT-(LVD)
IT-(AVD)
,