ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 42

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Supply, reset and clock management
5.4
Caution:
42/324
Figure 11. Clock, reset and supply block diagram
Multi-oscillator (MO)
The main clock of the ST7 can be generated by two different source types coming from the
multi-oscillator block:
●
●
Each oscillator is optimized for a given frequency range in terms of consumption and is
selectable through the option byte. The associated hardware configuration are shown in
Table
The OSC1 and/or OSC2 pins must not be left unconnected. For the purposes of Failure
Mode and Effect Analysis, it should be noted that if the OSC1 and/or OSC2 pins are left
unconnected, the ST7 main oscillator may start and, in this configuration, could generate an
f
unsafe/undefined state. The product behavior must therefore be considered undefined when
the OSC pins are left unconnected.
External clock source
In external clock mode, a clock signal (square, sinus or triangle) with ~50% duty cycle has to
drive the OSC1 pin while the OSC2 pin is tied to ground.
Crystal/ceramic oscillators
This family of oscillators has the advantage of producing a very accurate rate on the main
clock of the ST7. The selection within a list of five oscillators with different frequency ranges
must be done by option byte in order to reduce consumption (refer to
configuration
capacitors must be placed as close as possible to the oscillator pins in order to minimize
OSC
RESET
OSC2
OSC1
an external source
a crystal or ceramic resonator oscillator
clock frequency in excess of the allowed maximum (> 16 MHz), putting the ST7 in an
V
V
8. Refer to the electrical characteristics section for more details.
SS
DD
for more details on the frequency ranges). The resonator and the load
OSCILLATOR
RESET SEQUENCE
MULTI-
(MO)
MANAGER
(RSM)
f
OSC
Doc ID 12370 Rev 8
(option)
PLL
f
OSC2
SICSR
SYSTEM INTEGRITY MANAGEMENT
0
AVD AVD LVD
IE
AVD Interrupt Request
AUXILIARY VOLTAGE
F
LOW VOLTAGE
RF
DETECTOR
DETECTOR
(AVD)
(LVD)
0
/ 8000
0
0
WDG
RF
CLOCK (MCC/RTC)
WITH REALTIME
Section 22.2.1: Flash
TIMER (WDG)
CONTROLLER
MAIN CLOCK
WATCHDOG
8-BIT TIMER
ST72561-Auto
f
CPU