ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 63
ST72561J9-Auto
Manufacturer Part Number
ST72561J9-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet
1.ST72561R9-AUTO.pdf
(324 pages)
Specifications of ST72561J9-Auto
Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
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ST72561-Auto
7
7.1
7.2
Power saving modes
Introduction
To give a large measure of flexibility to the application in terms of power consumption, five
main power saving modes are implemented in the ST7 (see
●
●
●
●
●
After a RESET the normal operating mode is selected by default (RUN mode). This mode
drives the device (CPU and embedded peripherals) by means of a master clock which is
based on the main oscillator frequency divided or multiplied by 2 (f
From RUN mode, the different power saving modes may be selected by setting the relevant
register bits or by calling the specific ST7 software instruction whose action depends on the
oscillator status.
Figure 22. Power saving mode transitions
Slow mode
This mode has two targets:
SLOW mode is controlled by three bits in the MCCSR register: the SMS bit which enables or
disables Slow mode and two CPx bits which select the internal slow frequency (f
Slow
Wait (and Slow-Wait)
Active Halt
Auto Wake-up From Halt (AWUFH)
Halt
●
●
To reduce power consumption by decreasing the internal clock in the device,
To adapt the internal clock frequency (f
AUTO WAKE-UP FROM HALT
Doc ID 12370 Rev 8
ACTIVE HALT
SLOW WAIT
POWER CONSUMPTION
SLOW
WAIT
HALT
RUN
CPU
Low
) to the available supply voltage.
High
Figure
OSC2
22):
Power saving modes
).
CPU
).
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