ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 84

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Window watchdog (WWDG)
9.4
9.5
Caution:
84/324
Using halt mode with the WDG
If Halt mode with Watchdog is enabled by option byte (no watchdog reset on HALT
instruction), it is recommended before executing the HALT instruction to refresh the WDG
counter, to avoid an unexpected WDG reset immediately after waking up the microcontroller.
How to program the watchdog timeout
Figure 35
Watchdog Counter (CNT) and the resulting timeout duration in milliseconds. This can be
used for a quick calculation without taking the timing variations into account. If more
precision is needed, use the formulae in
When writing to the WDGCR register, always write 1 in the T6 bit to avoid generating an
immediate reset.
Figure 35. Approximate timeout duration
3F
38
30
28
20
18
10
08
00
1.5
shows the linear relationship between the 6-bit value to be loaded in the
18
34
Watchdog timeout (ms) @ 8 MHz f
Doc ID 12370 Rev 8
50
Figure
65
36.
82
OSC2
98
ST72561-Auto
114
128