W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 117

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

REQ_SEL [27:26]: External request pin selection, if GDMAMS [3:2]=00, REQ_SEL doesn’t care.
If REQ_SEL [27:26]=00, external request doesn’t use.
If REQ_SEL [27:26]=01, use nXDREQ1.
If REQ_SEL [27:26]=10, use nXDREQ2.
If REQ_SEL [27:26]=11, use nXDREQ3.
REQ_ATV [25]: nXDREQ High/Low active selection
If REQ_ATV [25]=0, nXDREQ1/2/3 is LOW active.
If REQ_ATV [25]=1, nXDREQ1/2/3 is HIGH active.
ACK_ATV [24]: nXDACK High/Low active selection
If ACK_ATV [24]=0, nXDACK is LOW active.
If ACK_ATV [24]=1, nXDACK is HIGH active.
SABNDERR [22]: Source address Boundary alignment Error flag
If TWS [13:12]=10, GDMA_SRCB [1:0] should be 00
If TWS [13:12]=01, GDMA_SRCB [0] should be 0
The address boundary alignment should be depended on TWS [13:12].
0 = the GDMA_SRCB is on the boundary alignment.
1 = the GDMA_SRCB not on the boundary alignment
The SABNDERR register bits just can be read only.
DABNDERR [21]: Destination address Boundary alignment Error flag
If TWS [13:12]=10, GDMA_DSTB [1:0] should be 00
If TWS [13:12]=01, GDMA_DSTB [0] should be 0
The address boundary alignment should be depended on TWS [13:12].
0 = the GDMA_DSTB is on the boundary alignment.
1 = the GDMA_DSTB not on the boundary alignment
The DABNDERR register bits just can be read only.
GDMATERR [20]: GDMA Transfer Error
O = No error occurs
1 = Hardware sets this bit on a GDMA transfer failure
Transfer error will generate GDMA interrupt
AUTOIEN [19]: Auto initialization Enable
0 = Disables auto initialization
1 = Enables auto initialization, the GDMA_CSRC0/1,GDMA_CDST0/1,and GDMA_CTCNT0/1 registers
are updated by the GDMA_SRC0/1,GDMA_DST0/1,and GDMA_TCNT0/1 registers automatically
when transfer is complete.
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W90N740CD/W90N740CDG