W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 127

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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Host Controller Command Status Register (HcCommandStatus)
Register: HcCommandStatus
HcCommandStatus
17-16
31-18
BITS
15-4
REGISTER
0
1
2
3
RESET
00b
0b
0b
0b
0b
0h
0h
0xFFF0.5008
ADDRESS
R/W
R/W
R/W
R/W
R/W
-
-
HostControllerReset
This bit is set to initiate the software reset. This bit is cleared by the
Host Controller, upon completed of the reset operation.
ControlListFilled
Set to indicate there is an active ED on the Control List. It may be set
by either software or the Host Controller and cleared by the Host
Controller each time it begins processing the head of the Control List.
BulkListFilled
Set to indicate there is an active ED on the Bulk List. The bit may be
set by either software or the Host Controller and cleared by the Host
Controller each time it begins processing the head of the Bulk List.
OwnershipChangeRequest
When set by software, this bit sets the OwnershipChange field in
HcInterruptStatus. The bit is cleared by software.
Reserved. Read/Write 0's
ScheduleOverrunCount
This field is increment every time the SchedulingOverrun bit in
HcInterruptStatus is set. The count wraps from ‘11’ to ‘00.’
Reserved. Read/Write 0's
R/W
R/W
Host Controller Command Status
Register
- 124 -
W90N740CD/W90N740CDG
DESCRIPTION
DESCRIPTION
RESET VALUE
0x0000.0000

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