W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 37

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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ECLKS [4] : External clock select
0 = External clock from EXTAL pin is used as system clock
1 = PLL output clock is used as system clock
After power on reset, the content of ECLKS is the Power-On Setting value. You can program this bit to
change the system clock source.
CLKS [3:1] : PLL output clock select
RESET [0] : Reset
This is a software reset control bit. Set logic 1 to generate an internal reset pulse. This bit is auto-clear to
logic 0 at the end of the reset pulse.
6.3
6.3.1
External Bus Interface (EBI) controls the access to the external memory (ROM/SRAM/FLASH, SDRAM)
and External I/O devices. The EBI has seven chip selects to select one ROM/FLASH bank, two SDRAM
banks, and four External I/O banks and 25-bit address bus. It supports 8-bit, 16-bit, and 32-bit external
data bus width for each bank.
The Features of the EBI:
*About 58.594KHz setting, two steps are needed.
When 24Mhz ~ 120MHz is setting, the ECLKS bit is needed to set on PLL output clock mode (logic 1).
First step, the ECLKS bit is set to External Clock mode (logic 0, 15MHz), then set CLKS bits to 0.
External I/O Control with 8/16/32 bit external data bus
Cost-effective memory-to-peripheral DMA interface
SDRAM Controller supports up to 2 external SDRAM & the maximum size of each device is
32MB
ROM/FLASH & External I/O interface
Support for PCMCIA 16-bit PC Card devices
External Bus Interface (EBI)
0
0
0
0
1
1
1
1
EBI Overview
CLKS [3:1]
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
- 34 -
W90N740CD/W90N740CDG
PLL OUTPUT CLOCK
58.594 KHz*
RESERVED
RESERVED
RESERVED
24 MHz
48 MHz
60 MHz
80 MHz

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