W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 120

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

SRC_BASE_ADDR [31:0]: 32-bit Source Base Address
Channel 0/1 Destination Base Address Register (GDMA_DSTB0, GDMA_DSTB1)
The GDMA channel starts writing its data to the destination address as defined in this destination base
address register. During a block transfer, the GDMA determines successive destination addresses by
adding to or subtracting from the destination base address.
DST_BASE_ADDR [31:0]: 32-bit Destination Base Address
Channel 0/1 Transfer Count Register (GDMA_TCNT0, GDMA_TCNT1)
GDMA_TCNT0 0xFFF0.400C
GDMA_TCNT1 0xFFF0.402C
GDMA_DSTB0 0xFFF0.4008 R/W Channel 0 Destination Base Address Register
GDMA_DSTB1 0xFFF0.4028 R/W Channel 1 Destination Base Address Register
REGISTER
REGISTER
31
23
15
31
23
15
7
7
ADDRESS
ADDRESS
30
22
14
30
22
14
6
6
29
21
13
R/W
29
21
13
5
5
R/W
R/W
R/W
SRC_BASE_ADDR [31:24]
SRC_BASE_ADDR [23:16]
DST_BASE_ADDR [31:24]
DST_BASE_ADDR [23:16]
SRC_BASE_ADDR [15:8]
DST_BASE_ADDR [15:8]
SRC_BASE_ADDR [7:0]
DST_BASE_ADDR [7:0]
28
20
12
28
20
12
4
4
Channel 0 Transfer Count Register
Channel 1 Transfer Count Register
- 117 -
W90N740CD/W90N740CDG
DESCRIPTION
DESCRIPTION
27
19
11
27
19
11
3
3
Publication Release Date: September. 19, 2005
26
18
10
26
18
10
2
2
25
17
25
17
9
1
9
1
RESET VALUE
RESET VALUE
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Revision A7
24
16
24
16
8
0
8
0