W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 66

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

WAY [31] ：Way selection
0 = Way0 is selected
1 = Way1 is selected
ADDR [30:0] ：The absolute address of instruction or data
6.5
The W90N740 has two Ethernet MAC Controllers (EMC) for WAN/LAN application. Each EMC has its
DMA controller, transmit FIFO, and receive FIFO. The Ethernet MAC controller consists of IEEE
802.3/Ethernet protocol engine with internal CAM address register for entry address comparison,
Transmit-FIFO, Receive-FIFO, TX/RX state machine controller and status controller. The EMC
supplies selectable MII (Media Independent Interface) or RMII (Reduced MII), for 10/100Mbits/s PHY
operated with 25M/2.5M Hz TXCLK/RXCLK.
The Features of each EMC:
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6.5.1
Buffer descriptors are used to handle the control, status and data information of each
received/transmitted frame. There is much information contained in the descriptors. The W90N740
totally implements four registers for receiving and four registers for transmitting, respectively. All the
registers are described below.
6.5.1.1. Rx Buffer Descriptor (RXBD)
O: Ownership bits
BIT [31: 30]
00
3
1
O
IEEE 802.3 protocol engine with programmable MII or RMII interface for 10/100 Mbits/s
DMA engine with burst mode
256 bytes transmit & 256 bytes receive FIFO for MAC protocol engine and DMA access
Built-in 16 entry CAM Address Register
Support long frame (more than 1518 bytes) and short frame (less than 64 bytes)
Re-transmit (during collision) the frame without DMA access
Half or full duplex function option
Support Station Management for external PHY
On-Chip Pad generation
3
0
Ethernet MAC Controller (EMC)
EMC Descriptors
= CPU
= DMA
2
9
Rx Status
Next Descriptor Starting Address
Data Buffer Starting Address
NAT Information (Reserved)
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Publication Release Date: September. 19, 2005
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