W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 28

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

Table 6.2.11 and Table 6.2.12
Using little-endian and half-word access, Program/Data path between register and external memory.
HA = Address whose LSB is 0, 2, 4, 6, 8, A, C, E
HAU = Address whose LSB is 2, 6, A, E
nWBE [3-0] / SDQM [3-0] = A means active and U means inactive
TIMING SEQUENCE
TIMING SEQUENCE
EXT. MEM DATA
CPU REG DATA
EXT. MEM DATA
CPU REG DATA
OPERATION
OPERATION
BIT NUMBER
BIT NUMBER
BIT NUMBER
BIT NUMBER
BIT NUMBER
NWBE [3-0] /
BIT NUMBER
BIT NUMBER
BIT NUMBER
BIT NUMBER
BIT NUMBER
XD WIDTH
XD WIDTH
SDQM [3-0]
SDQM [3-0]
ACCESS
ACCESS
SD
ED
XD
SA
XA
SA
SD
ED
XA
XD
Table6.2.11 Half-word access write operation with Little Endian
Table6.2.12 Half-word access read operation with Little Endian
CD CD
CD CD
CD CD
AB CD
31
31
UUAA
31
UUAA
31
15 0
15 0
15 0
15 0
HAL
HAL
HAL
HAL
CD
CD
CD
CD
WRITE OPERATION (CPU REGISTER
READ OPERATION (CPU REGISTER
0
0
0
0
WORD
WORD
31
ABCD
31
ABCD
0
0
CD CD
CD CD
CD CD
AB CD
31
31
AAUU
31
31 16
AAUU
31
HAU
15 0
HAU
15 0
15 0
HAL
HAL
CD
AB
AB
AB
0
0
0
0
- 25 -
W90N740CD/W90N740CDG
HALF WORD
HALF WORD
HAL = Address whose LSB is 0,4,8,C
X = Don’t care
CD CD
CD CD
Publication Release Date: September. 19, 2005
31
ABCD
31
31
XXAA
XXAA
15 0
15 0
15 0
15 0
15 0
15 0
15 0
HA
HA
CD
CD
CD
HA
CD
CD
HA
CD
CD
0
0
0
EXTERNAL MEMORY)
EXTERNAL MEMORY)
1st write
1st read
CD CD
31
XXXA
XXXA
15 0
7 0
7 0
7 0
7 0
7 0
HA
XD
HA
D
D
D
D
D
0
BYTE
BYTE
31
ABCD
15 0
15 0
HA
CD
HA
CD
0
2nd write
2nd read
CD CD
Revision A7
31
XXXA
XXXA
HA+1
15 0
HA+1
7 0
7 0
7 0
7 0
7 0
CD
C
C
C
C
C
0