W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 34

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

PLL Control Register （PLLCON）
W90N740 provides two options for clock generation - crystal and oscillator.
The external clock via EXTAL input pin as the reference clock input of PLL module. The external clock
can bypass the PLL and be used to the internal system clock by pull-down the data D15 pin. Using
PLL’s output clock for the internal system clock, D15 pin must be pull-up.
PWDEN [16] ：Power down mode enable
0 = PLL is in normal mode (default)
1 = PLL is in power down mode
FBDV [15:7] ：PLL VCO output clock feedback divider
Feedback Divider divides the output clock from VCO of PLL.
OTDV [6:5] ：PLL output clock divider
INDV [4:0] ：PLL input clock divider
Input Divider divides the input reference clock into the PLL.
REGISTER
PLLCON
FBDV
31
23
15
7
0
0
1
1
0xFFF0.0008
ADDRESS
OTDV [6:5]
30
22
14
6
OTDV
29
21
13
5
0
1
0
1
R/W
R/W
RESERVED
28
20
12
4
RESERVED
FBDV
- 31 -
PLL Control Register
W90N740CD/W90N740CDG
DESCRIPTION
27
19
11
3
Publication Release Date: September. 19, 2005
INDV
DIVIDED BY
26
18
10
2
1
2
2
4
25
17
9
1
RESET VALUE
0x0000.2F01
Revision A7
PWDEN
24
16
8
0