W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 62

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

6.4.4.3. Data Cache Flushing
The W90N740 allows flushing of the data cache under software control. The data cache may be
invalidated through writing flush line (FLHS) or flush all (FLHA) commands to the CAHCON register.
Flushing the entire D-Cache also flushed any locked down code. As flushing the data cache, the “V” bit
of the line is cleared to “0”. The D-cache is automatically flushed during reset.
6.4.4.4. Data Cache Load and Lock
The W90N740 supports a cache-locking feature that can be used to lock critical sections of data into D-
Cache to guarantee quick access. Lockdown can be performed with a granularity of one cache line. The
smallest space, which can be locked down, is 4 words. After a line is locked, it operates as a regular
instruction SRAM. The locked lines are not replaced during misses and it is not affected by flush per line
command.
To load and lock data, the following sequence should be followed:
1.
2.
3.
4.
5.
When using D-Cache load and lock command, there are some notes should be cared.
• The programs executing load and lock operation should be held in a non-cacheable area of
• The cache should be enabled and interrupts should be disabled.
• Software must flush the cache before execute load and lock to ensure that the data to be locked
6.4.4.5. Data Cache Unlock
The unlock operation is used to unlock previously locked cache lines. After unlock, the “L” bit of the line
is cleared to “0”. W90N740 has two unlock command, unlock line and unlock all.
The unlock line operation is performed on a cache line granularity. In case the line is found in the cache,
it is unlocked and starts to operate as a regular valid cache line. In case the line is not found in the
cache, no operation is done and the command terminates with no exception. To unlock one line the
following unlock line sequence should be followed:
The unlock all operation is used to unlock the whole D-Cache. This operation is performed on all cache
lines. In case a line is locked, it is unlocked and starts to operate as regular valid cache line. In case a
line is not locked or if it is invalid, no operation is performed. To unlock the whole cache, set the ULKA
and DCAH bits.
1.
2.
memory.
down is not already in the cache.
Write the start address of the data to be locked into CAHADR register.
Set LDLK and DCAH bits in the CAHCON register.
Increased the address by 16 and written into CAHADR register.
Set LDLK and DCAH bits in the CAHCON register.
Repeat the steps 3 and 4, until the desired data are all locked.
Write the address of the line to be unlocked into the CAHADR Register.
Set the ULKS and DCAH bits in the CAHCON register.
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W90N740CD/W90N740CDG
Publication Release Date: September. 19, 2005
Revision A7