W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 42

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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SDRAM Power Up Sequence
The default value of the mode register is not defined, therefore the mode register must be written after
power up to operate the SDRAM. W90N740 supports the function of Power Up Sequence, that is, after
system power on the W90N740 SDRAM Controller automatically executes the commands needed for
Power Up Sequence and set the mode register of each bank to default value. The default value is:
The value of mode register can be changed after power up sequence by setting the value of
corresponding bank’s configuration register “LENGTH” and “LATENCY” bits and set the MRSET bit
enable to execute the Mode Register Set command.
6.3.2.3. SDRAM Interface
— Burst Length = 1
— Burst Type = Sequential (fixed)
— CAS Latency = 2
— Write Burst Length = Burst (fixed)
W90N740
nSDQM[3:0]
nSCS[1:0]
D[31:0]
A[24:0]
nSRAS
nSCAS
nSWE
MCKE
MCLK
Fig 6.3.1 SDRAM Interface
- 39 -
nSDQM[3:0]
W90N740CD/W90N740CDG
A[10:0]
nSCS0
Publication Release Date: September. 19, 2005
A13
A14
64Mb 512Kx4x32
A[10:0]
DQM[3:0]
nRAS
nCAS
BS0
BS1
CLK
CKE
nCS
DQ[[31:0]
nWE
SDRAM
Revision A7

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