W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 119

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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However, if BME [9]=0, the GDMA_TCNT should be 0x10.
SIEN [8]: Stop Interrupt Enable
0 = Do not generate an interrupt when the GDMA operation is stopped
1 = interrupt is generated when the GDMA operation is stopped
SAFIX [7]: Source Address Fixed
0 = Source address is changed during the GDMA operation
1 = Do not change the destination address during the GDMA operation. This feature can be used
DAFIX [6]: Destination Address Fixed
0 = Destination address is changed during the GDMA operation
1 = Do not change the destination address during the GDMA operation. This feature can be used
DADIR [5]: Source Address Direction
0 = Source address is incremented successively
1 = Source address is decremented successively
DADIR [4]: Destination Address Direction
0 = Destination address is incremented successively
1 = Destination address is decremented successively
GDMAMS [3:2]: GDMA Mode Select
00 = Software mode (memory-to-memory)
01 = External nXDREQ1/2/3 mode for external device
10 = Reserved
11 = Reserved
GDMAEN [0]: GDMA Enable
0 = Disables the GDMA operation
1 = Enables the GDMA operation; this bit will be clear automatically when the transfer is complete on
Channel 0/1 Source Base Address Register (GDMA_SRCB0, GDMA_SRCB1)
The GDMA channel starts reading its data from the source address as defined in this source base
address register.
GDMA_SRCB0 0xFFF0.4004 R/W Channel 0 Source Base Address Register
GDMA_SRCB1 0xFFF0.4024 R/W Channel 1 Source Base Address Register
REGISTER
when data were transferred from a single source to multiple destinations.
when data were transferred from multiple sources to a single destination.
AUTOIEN [19] register bit is on Disable mode.
ADDRESS
R/W
- 116 -
W90N740CD/W90N740CDG
DESCRIPTION
RESET VALUE
0x0000.0000
0x0000.0000

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