W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 93

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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Only while Rx state machine stay at Halt state, the write command to Receive Start Demand register
can affect the Rx operation.
FIFO Threshold Adjustment Register (FIFOTHD_0, FIFOTHD_1)
Blength [21:20]: DMA burst length
Default value: 0h
Value setting:
SWR [16]: software reset
Default value: 0h
Software reset. After a reset is complete, the MAC controller will clear the SWR reset bit.
TxTHD [9:8]: Transmit FIFO Lower threshold Register
Default value: 1h
Value setting:
This value controls the transmit FIFO low threshold. If transmitting packet number is less than the
setting value, Tx DMA will request the arbiter to get data from memory.
FIFOTHD_0
FIFOTHD_1
REGISTER
31
23
15
7
00b: 4 beats
01b: 8 beats
10b: 16 beats
11b: 16 beats
00b: forbidden
01b: 32 bytes (i.e. high threshold 64 bytes)
10b: 64 bytes (i.e. high threshold 128 bytes)
11b: 96 bytes (i.e. high threshold 192 bytes)
Reserved
0xFFF0.30B0
0xFFF0.38B0
ADDRESS
30
22
14
6
29
21
13
5
R/W
R/W
R/W
Reserved
Reserved
Blength
FIFO Threshold Adjustment Register
FIFO Threshold Adjustment Register
28
20
12
4
Reserved
- 90 -
W90N740CD/W90N740CDG
DESCRIPTION
27
19
11
3
Reserved
26
18
10
2
25
17
9
1
RESET VALUE
RxTHD
TxTHD
0x0000.0101
0x0000.0101
SWR
24
16
8
0

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