W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 153

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

6.10.3 Timer Control Registers Map
R: read only, W: write only, R/W: both read and write, C: Only value 0 can be written
Timer Control Register 0 (TCR0)
Timer Control Register 1 (TCR1)
nDBGACK_EN [31]: ICE debug mode acknowledge enable
0 = When DBGACK is high, the timer clock will be held
1 = No matter what DBGACK is high or not, the timer clock will not be held
CE [30]: Counter Enable
0 = Stops counting
1 = Starts counting
IE [29]: Interrupt Enable
0 = Disables timer interrupt
1 = Enables timer interrupt. If timer interrupt is enabled, the timer asserts its interrupt signal when the
associated counter decrements to zero.
MODE [28:27]: Timer Operating Mode
nDBGACK_EN
REGISTER
REGISTER
TCR0
TCR1
TICR0
TICR1
TDR0
TDR1
TISR
WTCR
TCR0
TCR1
31
23
15
7
0xFFF8.1000
0xFFF8.1004
0xFFF8.100C
0xFFF8.101C
0xFFF8.1000
0xFFF8.1004
0xFFF8.1008
0xFFF8.1010
0xFFF8.1014
0xFFF8.1018
ADDRESS
ADDRESS
CE
30
22
14
6
29
21
13
R/W/C
IE
5
R/W
R/W
R/W/C
R/W
R/W
R/W
R/W
R/W
R/C
R
R
Timer Control Register 0
Timer Control Register 1
Timer Control Register 0
Timer Control Register 1
Timer Initial Control Register 0
Timer Initial Control Register 1
Timer Data Register 0
Timer Data Register 1
Timer Interrupt Status Register
Watchdog Timer Control Register
28
20
12
4
RESERVED
RESERVED
PRESCALE
- 150 -
MODE
W90N740CD/W90N740CDG
DESCRIPTION
DESCRIPTION
27
19
11
3
26
18
10
2
RESERVED
25
17
9
1
RESET VALUE
RESET VALUE
0x0000.0005
0x0000.0005
0x0000.00FF
0x0000.00FF
0x0000.0005
0x0000.0005
0x0000.00FF
0x0000.00FF
0x0000.0000
0x0000.0000
24
16
8
0