W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 146

• Manufacturer Part Number: W90N740CD
• Description: 32-Bit ARM7TDMI-Based Micro-Controller
• Manufacturer: WINBOND [Winbond]

FIFO Control Register (FCR)
RFITL [7:6]: RX FIFO Interrupt (Irpt_RDA) Trigger Level
DMS [3]: DMA Mode Select
The DMA function is not implemented in this version.
TFR [2]: TX FIFO Reset
Setting this bit will generate an OSC cycle reset pulse to reset TX FIFO. The TX FIFO becomes empty
(TX pointer is reset to 0) after such reset. This bit is returned to 0 automatically after the reset pulse is
generated.
RFR [1]: RX FIFO Reset
Setting this bit will generate an OSC cycle reset pulse to reset RX FIFO. The RX FIFO becomes
empty (RX pointer is reset to 0) after such reset. This bit is returned to 0 automatically after the reset
pulse is generated.
FME [0]: FIFO Mode Enable
Because UART is always operating in the FIFO mode, writing this bit has no effect while reading
always gets logical one. This bit must be 1 when other FCR bits are written to; otherwise, they will not
be programmed.
REGISTER
FCR
7
RFITL
RFITL [7:6]
0xFFF8.0008
ADDRESS
00
01
10
11
6
5
R/W
RESERVED
W
FIFO Control Register
4
IRPT_RDA TRIGGER LEVEL (BYTES)
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W90N740CD/W90N740CDG
DESCRIPTION
DMS
3
Publication Release Date: September. 19, 2005
01
04
08
14
TFR
2
RFR
1
RESET VALUE
Undefined
Revision A7
FME
0