MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 102

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Clock Module
Figure 10-2
M-clock divide selection (÷1, ÷2, ÷4, and ÷8 are selectable).
10.3 Register Map
102
$0014
$0015
$0016
$0017
Addr.
INTERNAL ECLK
Arm/Reset COP Register
Real-Time Interrupt Flag
Control Reg. (RTICTL)
Note: The MCLK depends on the chosen divider settings in the CLKCTL register.
COP Control Register
Real-Time Interrupt
shows clock timing relationships. Four bits in the CLKCTL register control the base clock and
Register (RTIFLG)
T1CLK
T2CLK
T3CLK
T4CLK
MCLK
MCLK
MCLK
MCLK
PCLK
Register Name
1
2
4
8
See page 105.
See page 107.
See page 107.
See page 109.
The register block can be mapped to any 2-Kbyte boundary within the
standard 64-Kbyte address space. The register block occupies the first 512
bytes of the 2-Kbyte block. This register map shows default addressing
after reset.
(COPRST)
(COPCTL)
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 10-3. Clock Function Register Map
Figure 10-2. Internal Clock Relationships
Bit 7
RTIE
RTIF
CME
Bit 7
0
0
0
0
0
MC68HC812A4 Data Sheet, Rev. 7
= Unimplemented
RSWAI
FCME
Bit 6
6
0
0
0
0
0
0
NOTE
RSBCK
FCM
Bit 5
5
0
0
0
0
0
0
FCOP
Bit 4
4
0
0
0
0
0
0
0
RTBYP
DISR
Bit 3
3
0
0
0
0
0
0
RTR2
CR2
Bit 2
2
0
0
0
0
0
0
Freescale Semiconductor
RTR1
CR1
Bit 1
1
0
0
0
0
0
0
RTR0
Bit 0
CR0
Bit 0
0
0
0
0
0
0