MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 149

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

RDS — Reduced Drive Port S Bit
SPC0 — See
13.6.4 Port S Wired-OR Mode Control
Freescale Semiconductor
Setting RDS lowers the drive capability of all port S output pins for lower power consumption and less
noise.
1 = Reduced drive
0 = Full drive
SPI control register 2
(SP0CR2)
SPI control register 1 (SP0CR1)
SCI0 control register 1 (SC0CR1)
SCI1 control register 1 (SC1CR1)
Chapter 14 Serial Communications Interface Module
Register
Table 13-1. Port S Pullup and Reduced Drive Enable
Register
Table 13-2. Port S Wired-OR Mode Enable
Control
PUPS
Bit
MC68HC812A4 Data Sheet, Rev. 7
PS7–PS0
Affected
Pullups
Pins
Enabled
Reset
State
Control
SWOM
WOMS
WOMS
Bit
Control
RDS
Bit
(SCI).
PS7–PS4
PS3, PS2
PS1, PS0
Affected
Reduced Drive
Pins
PS7–PS0
Affected
Pins
General-Purpose I/O Ports
Disabled
Disabled
Disabled
Disabled
Reset
State
Reset
State
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