MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 106

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Clock Module
RTIE — Real-Time Interrupt Enable Bit
Write: Anytime
RSWAI — RTI Stop in Wait Bit
Write: Once in normal modes, anytime in special modes
RSBCK — RTI Stop in Background Mode Bit
Write: Once in normal modes, anytime in special modes
RTBYP — RTI Bypass Bit
Write: Never in normal modes, anytime in special modes
RTR2, RTR1, RTR0 — Real-Time Interrupt Rate Select Bits
Write: Anytime
106
RTIE enables interrupt requests generated by the RTIF flag.
RSWAI disables the RTI and the COP during wait mode.
RSBCK disables the RTI and the COP during background debug mode.
RTBYP allows faster testing by causing the divider chain to be bypassed. The divider chain normally
divides M by 2
Rate select for real-time interrupt. The clock used for this module is the module (M) clock.
1 = RTIF interrupt requests enabled
0 = RTIF interrupt requests disabled
1 = RTI and COP disabled in wait mode
0 = RTI and COP enabled in wait mode
1 = RTI and COP disabled during background mode
0 = RTI and COP enabled during background mode
1 = Divider chain bypass
0 = No divider chain bypass
13
. When RTBYP is set, the divider chain divides M by 4.
RTR[2:1:0]
000
001
010
011
100
101
110
111
Table 10-2. Real-Time Interrupt Rates
M-Clock Divisor
MC68HC812A4 Data Sheet, Rev. 7
2
2
2
2
2
2
2
Off
13
14
15
16
17
18
19
M = 4.0 MHz
Real-Time Timeout Period
16.384 ms
32.768 ms
65.536 ms
131.72 ms
2.048 ms
4.096 ms
8.196 ms
Off
M = 8.0 MHz
16.384 ms
32.768 ms
65.536 ms
1.024 ms
2.048 ms
4.096 ms
8.196 ms
Off
Freescale Semiconductor

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