MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 88

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Expansion and Chip-Select
PWEN — Program Window Enable Bit
EWEN — Extra Window Enable Bit
8.4.9 Memory Expansion Assignment Register
Read: Anytime
Write: Anytime
A21E, A20E, A19E, A18E, A17E, and A16E — These bits select the memory expansion pins
ADDR21–ADDR16.
In single-chip modes, these bits have no effect.
8.5 Chip-Selects
The chip-selects are all active low. All pins in the associated port are pulled up when they are inputs and
the PUPF bit in PUCR is set.
If memory expansion is used, usually chip-selects should be used as well, since some translated
addresses can be confused with untranslated addresses that are not in an expansion window.
In single-chip modes, enabling the chip-select function does not affect the associated pins.
The block of register-following chip-selects CS3–CS0 allows many combinations including:
These register-following chip-selects are available in the 512-byte space next to and higher in address
than the 512-byte space which includes the registers. For example, if the registers are located at $0800
to $09FF, then these register-following chip-selects are available in the space from $0A00 to $0BFF.
88
•
•
•
•
1 = Enables paging of the program space
0 = Disables PPAGE
1 = Enables paging of the extra space (1 Kbyte) via the EPAGE register
0 = Disables EPAGE
1 = Selects memory expansion for the associated bit function, overrides DDRG
0 = Selects general-purpose I/O for the associated bit function
512-byte CS0
256-byte CS0 and 256-byte CS1
256-byte CS0, 128-byte CS1, and 128-byte CS2
128-byte CS0, 128-byte CS1, 128-byte CS2, and 128-byte CS3
(16 Kbytes: $8000–$BFFF) via the PPAGE register
Address: $0038
Reset:
Read:
Write:
Figure 8-15. Memory Expansion Assignment Register (MXAR)
Bit 7
0
0
= Unimplemented
6
0
0
MC68HC812A4 Data Sheet, Rev. 7
A21E
5
0
A20E
4
0
A19E
3
0
A18E
2
0
A17E
1
0
Freescale Semiconductor
A16E
Bit 0
0