MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 206

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Analog-to-Digital Converter (ATD)
16.6.9 ATD Result Registers
Read: Anytime
Write: Has no meaning or effect
ADRxH7–ADRxH0 — ATD Conversion Result Bits
16.7 Low-Power Options
This section describes the three low-power modes:
16.7.1 Run Mode
Clearing the ATD power-up bit, ADPU, in ATD control register 2 (ATDCTL2) reduces power consumption
in run mode. ATD registers are still accessible, but the clock to the ATD is disabled and ATD analog
circuits are powered down.
16.7.2 Wait Mode
ATD operation in wait mode depends on the state of the ATD stop in wait bit, AWAI, in ATD control register
2 (ATDCTL2).
206
These bits contain the left justified, unsigned result from the ATD conversion. The channel from which
this result was obtained depends on the conversion mode selected. These registers are always
read-only in normal mode.
Run mode
Wait mode
Stop mode
If AWAI is clear, the ATD operates normally when the CPU is in wait mode
If AWAI is set, the ATD clock is disabled and conversion continues unless ASWAI bit in ATDCTL2
register is set.
Address:
Reset:
Read:
Write:
ADRxH7
Bit 7
ADR0H:
ADR1H:
ADR2H:
ADR3H:
ADR4H:
ADR5H:
ADR6H:
ADR7H:
Figure 16-13. ATD Result Registers (ADR0H–ADR7H)
$0070
$0072
$0074
$0076
$0078
$007A
$007C
$007E
= Unimplemented
ADRxH6
6
MC68HC812A4 Data Sheet, Rev. 7
ADRxH5
5
ADRxH4
4
Indeterminate
ADRxH3
3
ADRxH2
2
ADRxH1
1
Freescale Semiconductor
ADRxH0
Bit 0

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