MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 232

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Electrical Characteristics
18.13 Non-Multiplexed Expansion Bus Timing
232
1. V
2. All timings are calculated for normal port drives.
3. This characteristic is affected by clock stretch.
Num
11
12
13
14
15
16
17
18
19
20
21
22
23
26
27
28
29
1
2
3
5
6
7
Add N × t
4. Equation still under evaluation
DD
= 5.0 Vdc ± 10%, V
Frequency of operation (E-clock frequency)
Cycle timet
Pulse width, E lowPW
Pulse width, E high
Address delay timet
Address hold time
Address valid time to E riset
Read data setup time
Read data hold time
Write data delay time
Write data hold time
Write data setup time
Read/write delay timwt
Read/write valid time to E riset
Read/write hold time
Low strobe delay timet
Low strobe valid time to E riset
Low strobe hold time
Address access time
Access time from E rise
Chip-select delay timet
Chip-select access time
Chip-select hold time
Chip-select negated timet
cyc
where N = 0, 1, 2, or 3, depending on the number of clock stretches.
cyc
= 1/f
SS
o
(3)
AD
(3)
= 0 Vdc, T
(4)
PW
(3)
Characteristic
EL
LSD
RWD
CSD
= t
t
t
t
ACCA
(3)
(3)
DDW
DSW
= t
EH
cyc
CSN
t
t
= t
ACCE
ACCS
= t
cyc
= t
AV
/4 + delay
= t
= t
= PW
cyc
= t
cyc
/2 + delay
cyc
= t
RWV
cyc
LSV
= PW
cyc
A
/4 + delay
cyc
= PW
= t
/4 + delay
cyc
/4 + delay
= T
/2 + delay
/4 + delay
−t
EH
= PW
cyc
MC68HC812A4 Data Sheet, Rev. 7
/4 + delay
= PW
L
EL
AD
(1), (2)
−t
−t
EH
to T
−t
−t
DDW
CSD
EL
−t
AD
EL
DSR
H
DSR
−t
−t
−t
, unless otherwise noted
LSD
RWD
DSR
Delay
−2
−2
29
25
18
18
29
5
Symbol
PW
PW
t
t
t
t
t
t
t
t
t
t
t
ACCA
ACCE
t
ACCS
t
t
t
t
t
DHW
DDW
DSW
RWD
RWV
RWH
t
t
t
DSR
DHR
CSD
CSH
CSN
t
LSD
LSV
LSH
cyc
AD
AH
f
AV
o
EH
EL
Freescale Semiconductor
Min
125
dc
60
60
20
30
20
30
20
20
11
20
36
0
0
0
8 MHz
Max
8.0
60
46
49
49
35
30
60
65
10
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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