MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 98

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Key Wakeups
9.2.12 Port J Key Wakeup Flag Register
Read: Anytime
Write: Anytime
Each flag gets set by an active edge on the associated input pin. This could be a rising or falling edge
based on the state of the KPOLJ register. To clear the flag, write 1 to the corresponding bit in KWIFJ.
Initialize this register after initializing KPOLJ so that illegal flags can be cleared.
KWIFJ7–KWIFJ0 — Key Wakeup Port J Flags
9.2.13 Port J Key Wakeup Polarity Register
Read: Anytime
Write: Anytime
It is best to clear the flags after initializing this register because changing the polarity of a bit can cause
the associated flag to set.
KPOLJ7–KPOLJ0 — Key Wakeup Port J Polarity Select Bits
98
1 = An active edge on the associated bit has occurred. An interrupt occurs if the associated enable
0 = An active edge on the associated bit has not occurred.
1 = Rising edge on the associated port J pin sets the associated flag bit in the KWIFJ register.
0 = Falling edge on the associated port J pin sets the associated flag bit in the KWIFJ register.
bit is set.
Address: $002B
Address: $002C
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 9-13. Port J Key Wakeup Polarity Register (KPOLJ)
KPOLJ7
KWIFJ7
Figure 9-12. Port J Key Wakeup Flag Register (KWIFJ)
Bit 7
Bit 7
0
0
KPOLJ6
KWIFJ6
6
0
6
0
MC68HC812A4 Data Sheet, Rev. 7
KPOLJ5
KWIFJ5
5
0
5
0
KPOLJ4
KWIFJ4
4
0
4
0
KPOLJ3
KWIFJ3
3
0
3
0
KPOLJ2
KWIFJ2
2
0
2
0
KPOLJ1
KWIFJ1
1
0
1
0
Freescale Semiconductor
KPOLJ0
KWIFJ0
Bit 0
Bit 0
0
0