MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 181

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.4 Register Map
Freescale Semiconductor
Addr.
$00D0
$00D1
$00D2
$00D3
$00D5
$00D6
$00D7
Register 1 (SP0CR1)
Register 2 (SP0CR2)
Port S Data Direction
Port S Data Register
SPI Status Register
Register Name
SPI Data Register
Register (SP0BR)
Register (DDRS)
SPI Baud Rate
See page 186.
See page 187.
See page 188.
See page 189.
See page 190.
See page 147.
See page 148.
SPI 0 Control
SPI 0 Control
The register block can be mapped to any 2-Kbyte boundary within the
standard 64-Kbyte address space. The register block occupies the first 512
bytes of the 2-Kbyte block. This register map shows default addressing
after reset.
(PORTS)
(SP0DR)
(SP0SR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
DDRS7
Bit 7
SPIE
SPIF
Bit 7
PS7
0
0
0
0
0
0
0
Figure 15-2. SPI Register Map
MC68HC812A4 Data Sheet, Rev. 7
= Unimplemented
DDRS6
WCOL
SPE
PS6
6
0
0
0
0
0
0
6
0
NOTE
DDRS5
SWOM
PS5
5
0
0
0
0
0
0
0
5
0
Unaffected by reset
Unaffected by reset
DDRS4
MODF
MSTR
PS4
4
0
0
0
0
0
0
4
0
DDRS3
CPOL
PUPS
PS3
3
0
1
0
0
0
0
3
0
DDRS2
CPHA
SPR2
RDS
PS2
2
1
0
0
0
0
2
0
DDRS1
SSOE
SPR1
PS1
1
0
0
0
0
0
0
1
0
Register Map
DDRS0
SPC0
SPR0
LSBF
Bit 0
PS0
0
0
0
0
0
0
0
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